Meeting Functional Safety Standards on Algorithm Implementation for FPGA and ASIC in a Dynamic Automotive Environment

Abstract

FPGAs and ASICs are playing a greater role across an increasing variety of automotive systems and applications because of their high throughput, low latency, and superior per-watt performance. However, we see different challenges related to their development in the automotive industry: There is a need for efficient inter-team communication and collaboration in multidisciplinary FPGA/programmable SoC and ASIC projects. Changing requirements and shrinking design cycles require the ability to react faster. Standards, such as ISO^® 26262 for functional safety, must be fulfilled, while shorter project deadlines must be met. Finally, the global chip shortage drives the need for hardware-independent portable workflows, enabling more rapid adaptation to changes in the supply chain and smoother transitions from FPGAs to ASICs. This work explores an integrated workflow for designing and implementing signal processing, control design, and vision algorithms on FPGAs, programmable SoCs, and ASICs to address these challenges. We briefly cover the process-spanning requirements of authoring, architectural modeling, and modeling for HDL implementation, with verification and validation at each step. Furthermore, we cover related hardware/software co-design aspects. We show how an integrated, hardware-independent, and prequalified toolchain enables users to streamline ISO 26262 certification.

This paper was presented at Embedded World Conference 2023.