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Verification

Show equivalence between model and generated code

Code verification is a part of the workflow that shows that the generated code correctly implements a model and does not contain unintended functionality. Through behavioral and structural comparisons, code verification demonstrates the equivalence between the model and generated object code.

Test numerical equivalence between your model (component) and generated code by comparing normal mode simulation results against software-in-the-loop (SIL) or processor-in-the-loop (PIL) simulation results.

Show the absence of unintended functionality by comparing model coverage against code coverage or performing a traceability analysis. Configure SIL and PIL simulations to generate code coverage metrics. Generate reports that provide bidirectional traceability between model objects and generated code.

In addition to Embedded Coder®, you can use other products for code verification. For example, Simulink® Requirements™, Simulink Test™, and Polyspace® products.

Featured Examples