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Data Converters

Simulate analog-to-digital and digital-to-analog data converters.

Simulate and analyze performance metrics of analog-to-digital and digital-to-analog data converters. Start from complete system-level models of typical ADC or DAC architectures. Modify ADC or DAC parameters until you reach your desired system specifications. Use Measurements and Testbenches to validate your design.


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Sampling Clock SourceGenerate clock signal with aperture jitter
Delta Sigma ModulatorModel a discrete delta sigma modulator based ADC (Since R2021b)
Flash ADCN-bit ADC with flash architecture
SAR ADCN-bit successive approximation register (SAR) based ADC
Interleaved ADCTime-interleaved ADC model (Since R2023b)
Binary Weighted DACN-bit DAC based on R-2R weighted resistor architecture (Since R2020a)
Segmented DACConvert large digital input to analog signal using arrangement of smaller DACs (Since R2021a)