This example shows the generation of I-V and C-V characteristics for an NMOS transistor. Define the bias conditions for the gate-source and drain- source voltage sweeps and the types of plots to be generated by double- clicking the Define Sweep Parameters block. Then click on the "Generate plots" hyperlink in the model . The output capacitance, C_oss, is only shown for sweeps of the drain-source voltage. Note that the C-V characteristics can take several minutes each to generate.
This type of analysis can be used in order to compare against a manufacturer datasheet to confirm a correct implementation of the transistor parameters. This applies to both the DC and AC transistor characteristics. You can also use this model to examine the nonlinear capacitance characteristics as functions of the bias conditions.
Double-click the Analyzer block to see the underlying circuit. It superimposes an AC small-signal voltage on top of a DC bias voltage. The DC characteristics are obtained by filtering out the AC part of the response. The small-signal Y-parameters are obtained by subtracting the DC current from the total (AC+DC) current, and then dividing by the small-signal excitation voltage.
The plots below show Id, Ciss, Crss and Coss as functions of Vgs and/or Vds as appropriate for the parameters chosen. Successive simulations are run for the range of bias conditions defined. In order to handle small-signal measurements, every bias point is left to settle for a certain number of AC cycles before the measurement is recorded for plotting.