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CEI 112G-VSR Compliance Kit

CEI 112G-VSR is a common electrical interface (CEI) implementation agreement that supports 112 Gb/s over “Very Short Reach” (VSR) optical or electrical chip-to-module applications. The CEI-112G-VSR clause is a part of the Common Electrical I/O Implementation Agreement. The CEI 112G-VSR interface relies on PAM4 modulation to increase the bandwidth in VSR channels. The PAM4 modulation can transmit 4-symbols per UI instead of 2-symbols per UI that the NRZ modulation transmits.

The CEI 112G-VSR is designed for bidirectional analysis of a host board and an optical module board. The total channel loss at Nyquist or Fb/2 is approximately 16 dB. The VSR channel consists of a host board, a mated connector and a module board. This represents the connection between the transmitting and receiving data across the channel. The kit contains sheets that include design and characterization details for a specific host or a module board design and characterization. Network characterization is set up for insertion and return loss testing to the compliance masks, and channel FEXT/NEXT crosstalk is included in multi-channel sheets to measure the effects on BER compliance and RX stress testing.

This CEI 112G-VSR enables you to insert a channel design and characterize and validate its performance using the specification masks to determine if the channel has a high confidence of success. If the channel does not meet the compliance masks or BER estimates, you need to further investigate the channel performance or redesign the channel, keeping in mind that not all compliance metrics can be simulated and need to be measured in a laboratory environment.

Open CEI 112G-VSR Kit

Open the CEI 112G-VSR kit in the Serial Link Designer app using the openSignalIntegrityKit function.

Signal Integrity Toolbox recommends you to set the Java Heap Memory to at least 8192MB.
Use Home Tab -> Preferences -> MATLAB -> General -> Java Heap Memory
Current Java Heap: 231MB with 88MB in use. Maximum heap: 1584MB. Heap setting: 1728MB.


Kit Overview

  • Project Name: CEI_112G_VSR

  • Interface Name: CEI_112G_VSR

  • Target Operating Frequency: 112 Gb/s (PAM4 encoding)

The CEI 112G-VSR kit defines two schematic sets. Schematic sheets are included for testing a CEI 112G-VSR channel with mated connector to a module board. The masks provided in this kit are based on the OIF CEI 112G-VSR specifications [1].

  • Compliance – All compliance host-to-module or module-to-host simulations

  • Host_to_Module_Compliance – Compliance board network simulations.

  • Module_to_Host_Compliance – Compliance board network simulations.

For more information about the CEI 112G-VSR channel compliance schematics, transfer net properties, and compliance rules, refer to CEI_112G_VSR.pdf, which is attached to this example as a supporting file.


[1] oif2017.346.21.pdf: CEI-112G-VSR-PAM4 Very Short Reach Interface (Draft from Implementation Agreement OIF-CEI-5.0,

See Also