FPGA Subsystem Configuration

FPGA subsystem configuration with HDL Coder™ HDL Workflow Advisor

Install Speedgoat FPGA modules in the target computer system and use them for specialized reconfigurable I/O in your real-time application.

FPGA I/O modules include their own local I/O, including digital and analog input and output channels. For more information about FPGA modules, see Speedgoat FPGA Support with HDL Workflow Advisor.

Select one or multiple FPGA I/O modules by using HDL Coder HDL Workflow Advisor. You then identify subsystems of your Simulink® model to delegate to HDL code generation during the model build. In this way, you create real-time applications that run on the target computer system CPU and on the FPGA I/O modules.


Speedgoat FPGA Support with HDL Workflow Advisor

Implementing Simulink algorithms on FPGAs.

FPGA Subsystem Plan

Prepare the FPGA subsystem for HDL code generation and FPGA synthesis.

Interrupt Configuration

Schedule the real-time application by using an interrupt on the FPGA.

FPGA Synchronization Modes

Learn about the differences among free running, blocking coprocessor, and delayed coprocessor modes.

Featured Examples