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I can't find QPSK timing recovery model example built with Simulink® and Xilinx System Generator for DSP™

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Timur Zubov
Timur Zubov on 27 Jun 2019
Answered: Kiran Kintali on 1 Nov 2020
I can't find QPSK timing recovery model example for Xilinx Kintex-7 FPGA DSP Development Kit shown in Using Xilinx System Generator for DSP with Simulink and HDL Coder and Rapid Deployment of MATLAB and Simulink Designs on Xilinx FPGAs (17:19) webinars. This example was available here but now it's empty. I found web.archive version wich was available in 2015. But there isn't example's file to download. I can't find example in Community and anywhere else. Can anybody share it with me?
I just know that I need "Using_Xilinx_System_Generator_for_DSP_with_Simulink_and_HDL_Coder_v1_0.zip" wich include:
  • QPSK timing recovery models built with Simulink® and Xilinx System Generator for DSP™
  • The Co-Simulation design example contains the design shown in the webinar “Using Xilinx System Generator for DSP with Simulink and HDL Coder”
  • The Deployment design example contains the design shown in the webinar “Rapid Deployment of MATLAB and Simulink Designs on Xilinx FPGAs”
  • Xilinx System Generator plug-in enabling the use of the high-speed analog interface on the FMC-150 card in a MATLAB®, Simulink, and System Generator environment
  • Getting Started Guide with instructions for hardware and software tool setup and demo operation
  • Presentation slides from the webinars

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Answers (1)

Kiran Kintali
Kiran Kintali on 1 Nov 2020
This is a Xilinx System Generator support question. Please contact xilinx.
https://www.xilinx.com/products/design-tools/vivado/integration/sysgen.html

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