Respondida
hdl coder model checker output latetency and ulp error warning
These are messages informing about blocks that introduce latency. In case you have such blocks in feedback loops you need to tak...

más de 5 años hace | 0

| aceptada

Respondida
Fixed-Point Designer tells me that "Magnitude-Angle to Complex" Block is not supported. Why?
This issue is resolved in R2016b release.

más de 5 años hace | 0

Respondida
Simulink Spectrum Analyzer shows noise floor below max SQNR
https://www.mathworks.com/help/dsp/ref/spectrumanalyzer.html There are multiple settings that could affect the observed noise f...

más de 5 años hace | 0

| aceptada

Respondida
errors with HDL verification # very with HDL test bench
What is the release you are currently running into this error? It looks like you are running into a HDL code generation issue. ...

más de 5 años hace | 0

Respondida
how translate stateflow variable to hdl std_logic_vector(0 to 7)
>> type compBoolVector.m function y = compBoolVector(u, v) y = all(u == v); >> >> a = true(1, 10); b = a; % create so...

más de 5 años hace | 0

Respondida
how translate stateflow variable to hdl std_logic_vector(0 to 7)
HDLCoder does not currently support such customization. Fixed Point types generate DOWNTO syntax, and arrays including array of ...

más de 5 años hace | 0

| aceptada

Respondida
Is it possible to generate HDL code (VHDL) of a Simulink variant reference model in a way that the "active variant" is selectable through VHDL generics?
HDL Coder compiles away all the inactive variants and generates code only for the active variant. Can you share a sample model a...

más de 5 años hace | 0

| aceptada

Respondida
HDL Code Generation Erros
>> makehdl(gcb) ### Generating HDL for 'Pattern_Detector_19a/Subsystem'. ### Using the config set for model Pattern_Detector_1...

más de 5 años hace | 0

| aceptada

Respondida
HDL Code Generation Error
See resolution in https://www.mathworks.com/matlabcentral/answers/606331

más de 5 años hace | 1

| aceptada

Respondida
HDL Code Generation Erros
HDLCoder does not support Stateflow chart configured with floating-point types. Based on your application you do not need s...

más de 5 años hace | 1

Respondida
HDL coder not loading simulation tool
>> help hdlsetuptoolpath hdlsetuptoolpath Setup synthesis tool path and environment variables in current MATLAB session. ...

más de 5 años hace | 0

| aceptada

Respondida
DE-10 Nano development kit
Can you consider using the example and extend to DE-10 Nao Kit? https://www.mathworks.com/help/hdlcoder/ug/define-and-register-...

más de 5 años hace | 0

Respondida
Timed out on waiting for AXI write response.
This is insufficient info to answer the question. Someone to answer this question would need to know the following details at th...

más de 5 años hace | 0

Respondida
HDL Coder Sharing alters wordlength of multiplier
In hardware multipliying two inputs of size 'n' and 'm' would result in full precision output of 'n+m'. The result is further tr...

más de 5 años hace | 0

| aceptada

Respondida
HDL FIFO and (not so) algebraic loop errors
Can you share the model with the algberaic loop error? What version of MATLAB and HDL Coder are you currently using? Thanks.

más de 5 años hace | 1

Respondida
from HDL to Matlab
You can consider using HDL cosimulation block in Simulink. https://www.mathworks.com/help/hdlcoder/ug/hdl-verifier-cosimulation...

más de 5 años hace | 0

Respondida
Generate HDL error: Reference to non-existent field 'hasVariantError'.
Thanks for reporting this issue. An updated check compatibility of the Simulink code generation folder is added during HDL code ...

más de 5 años hace | 1

Respondida
Custom Convolution neural network model code conversion for FPGA
https://www.mathworks.com/products/deep-learning-hdl.html Deep Learning HDL Toolbox™ provides functions and tools to prototype ...

más de 5 años hace | 0

Respondida
State vector PWM on FPGA
Can you check if these links are of help? Deploy Simscape Buck Converter Model to Speedgoat IO Module Using HDL Workflow Script...

más de 5 años hace | 0

Respondida
HDL coder and verifier: Xilinx Arty S7-25 vs S7-50
The generated HDL code from HDL Coder and HDL Verifier workflows are not tied to specific hardware and wide range of FPGA device...

más de 5 años hace | 1

Respondida
Can anyone help me with the name of this block?
web(fullfile(docroot, 'simulink/slref/ratetransition.html')) NoOp --> Does nothing / Copy

más de 5 años hace | 0

Respondida
How to integrate with Verilog Code Generator with custome approach instead of Simulink?
web(fullfile(docroot, 'hdlcoder/gs/generate-hdl-code-from-matlab-code-using-the-command-line-interface.html')) This product hel...

más de 5 años hace | 0

Respondida
How to integrate with Verilog Code Generator with custome approach instead of Simulink?
Here are some links that can help in describing the workflow to translate MATLAB to Verilog. Please note you need to follow best...

más de 5 años hace | 0

Respondida
fixdt in simulink and fixed-point percision in system generator is equal ???
This should help answer the question on proper use of Xilinx System Generator and HDL Coder in an integrated workflow. https://...

más de 5 años hace | 0

Respondida
HDL generation from inside a (library) linked subsystem
HDL code generation from reference subsystems is now supported in HDL Coder.

más de 5 años hace | 0

Respondida
How to remove errors of Verify Fixed Point Design step of HDL Coder?
Fixed-point conversion is an assisted process. Automated conversion of fixed-point can fail if best practices of conversion are ...

más de 5 años hace | 0

Respondida
how to use an external memory(ddr2, dpram) in HDL coder by matlab??
Performing Large Matrix Operation on FPGA using External Memory web(fullfile(docroot, 'hdlcoder/ug/performing-large-matrix-oper...

más de 5 años hace | 0

Respondida
how does loop unroll work in hdl coder?
These HDL Coder documentation files should explain the behavior. https://www.mathworks.com/help/hdlcoder/ref/coder.hdl.loopspec...

más de 5 años hace | 0

Respondida
How to solve "unsupported unbounded loop structure" error when generate hdl code from stateflow
The model has only dead logic. Please share updated model.

más de 5 años hace | 0

Respondida
How to implement a 3D Lookup Table that can be converted with HDL Coder?
Can you consider the following modeling workaround until 3D LUT table support is available in HDL Coder?

más de 5 años hace | 0

| aceptada