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[Fixed-point converter] Passing constant struct to entry point
please share dut.m and dut_tb.m with the sample code and data types. if you have project or input types to compile the code it w...

casi 6 años hace | 0

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Exclude Signal from Delay Balancing
Can you share your model? This example shows how to balance delays in specific parts of a design, without balancing delays on t...

casi 6 años hace | 0

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How can I convert my trained network in matlab into Verilog using HDL coder? Can you give me directions to proceed.
please connect with support@mathworks.com about this capability. Thanks.

casi 6 años hace | 0

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'hdlv_copyfiles' used in an example doesn't work, and nothing comes up for that when I google. Is there a typo?
I think it is an example helper file. If the HDLVerifier is installed correctly the file should be at this location matlab/too...

casi 6 años hace | 0

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stateflow hdl code generation hierachy flatten
This is a good suggestion. Unfortunately it is not currently possible to reduce the depth of logical paths during codegeneration...

casi 6 años hace | 0

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How to serialize an HDL Coder function with a vector input ?
You can use mlhdlc_heq.m and mlhdlc_heq_tb.m example files on how to serialize input passed to the design. Thanks. https://www....

casi 6 años hace | 0

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[HDL Coder] How to keep subsystems port names when applying input/output pipelining
Hi, Can you share the model and generated code? Thanks.

alrededor de 6 años hace | 0

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Trigger type 'either' is not supported for HDL code generation.
This is a known limitation with HDL code generation. Stateflow team at MathWorks has provided a modeling workaround. Please see ...

alrededor de 6 años hace | 0

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Trigger type 'either' is not supported for HDL code generation.
Can you share a sample model of your Stateflow usecase? Thanks

alrededor de 6 años hace | 0

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When using the HDL Workflow Advisor, why do I get errors in Task 1.2 that mention "Dot indexing is not support for variables of this type"?
Thanks for identifying the root cause of the issue. It is worth improving the error message. I do not see a model. Can you creat...

alrededor de 6 años hace | 0

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how do i get the hdl code from simulink with sine waves in my model
Hi Shaurya, Can you check these options? https://www.mathworks.com/help/hdlcoder/ref/sinehdloptimized.html https://www.mathw...

alrededor de 6 años hace | 1

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Rate transitions and HDL generation port requirement
hi michael, can you share the model to further understand the behavior? thanks

alrededor de 6 años hace | 0

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how do i get the hdl code from simulink with sine waves in my model
Hi Shaurya, Can you share the model? Thanks.

alrededor de 6 años hace | 0

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Generic port length when integrating existing HDL code with Simulink model using BlackBox
Can you share a model to describe your usecase? please also attach generated code and expected code with the blackbox settings u...

alrededor de 6 años hace | 0

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Check Block Compatibiity Error
Can you share a sample model? Thanks

alrededor de 6 años hace | 0

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Generic port length when integrating existing HDL code with Simulink model using BlackBox
Have you used the GenericList parameter in HDLCoder? Thanks GenericList Pass a cell array variable that contains cell arr...

alrededor de 6 años hace | 0

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Unable to find the software for XILINXLOGICORE
It is possible Xilinx LOGICORE is not avaialble with Vivado and you need to setup Xilinx ISE to use it. Please check Xilinx Docu...

alrededor de 6 años hace | 1

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Unable to find the software for XILINXLOGICORE
hi Samuel, There is a special Note about Vivado in the help text: Please note that Xilinx Vivado launcher for Windows i...

alrededor de 6 años hace | 1

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How to use Matlab generated c code for High Level Synthesis ?
Hi Shravan, I believe you are generating C code from MATLAB code using MATLAB Coder and trying it to take it through GAUT - Hig...

alrededor de 6 años hace | 0

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HDL Workflow Advisor change the name of the generated header file
This header file has the same name as the IP core. The IP core name can be set in Task 3.2 “Generate RTL Code and IP Core”. C...

alrededor de 6 años hace | 0

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Error: A cast between fixpt and floating point type is not supported
Hi Sandip, Since dwt2 is not supported out of the box, please consider using core MATLAB to HDL features and implement dwt2_fp...

alrededor de 6 años hace | 1

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Error: A cast between fixpt and floating point type is not supported
Hi Sandip, The issue here is not related to fixed-point conversion; HDL Coder currently does not support dwt2 function out of t...

alrededor de 6 años hace | 0

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Matlab HDL coder can not perform to send an image matrix to a matlab function.How to resolve it?
https://www.mathworks.com/help/hdlcoder/examples/image-enhancement-by-histogram-equalization.html 'mlhdlc_heq.m' (DUT) and 'mlh...

alrededor de 6 años hace | 1

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VHDL code generation and avoiding magic numbers?
Currently HDLCoder does not have the capaibility of generating all constants into pkg file. Please reach out to support@mathwork...

alrededor de 6 años hace | 0

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Delay balancing unsuccessful because Signal rate of value inf found.
Can you share the model and the version of MATLAB you are using that exhibits this behavior? Thanks.

alrededor de 6 años hace | 0

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Delay balancing unsuccessful because Signal rate of value inf found.
Can you run HDL model advisor check shown below to see if you can detect the block? If the block with Inf sample time is not...

alrededor de 6 años hace | 0

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How to convert a Simscape Electrical model into a Fixed-point HDL generable model ?
This workflow currently supports double, single and in future half precision formats. The workflow currently does not yet supp...

alrededor de 6 años hace | 1

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can a single model containing 2 different subsystems generate HDL and C code for the subsystems seperately?
Yes. You can generate code independently using embedded Coder and HDL Coder products for the two subsystems and integrate the co...

más de 6 años hace | 1

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HDL Coder to / downto order
This is a limitation due to an early decision made to emit vector of boolean to use 'TO' syntax and is not currently customizabl...

más de 6 años hace | 0

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pir_core:pirudd:assertionFailed: Assertion failed: b:\matlab\src\cgir_hdl\dom_pir_core\cgtransformdriver.cpp:155:lsv_result != CG::transform::StructExplosion::RESULT_ERROR
This looks like an unexpected internal error. Can you contact techsupport@mathworks.com with reproduction steps? Thanks

más de 6 años hace | 0