Verifying an FPGA Implementation of an LTE Turbo Decoder - MATLAB & Simulink
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    Verifying an FPGA Implementation of an LTE Turbo Decoder

    The Turbo Decoder in Wireless HDL Toolbox™ is a Simulink® building block for use in FPGA or ASIC designs that need to deliver LTE signal information to your application. Typically, these designs start as algorithms in MATLAB® and LTE Toolbox™. Learn how to use your MATLAB based test environment to drive your Simulink based hardware implementation model and compare the results against your algorithmic golden reference model.

    Published: 14 Sep 2017