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QSPI Peripheral Configuration

Map QSPI peripherals in the Infineon AURIX model to peripheral registers in the MCU

Since R2024a

Description

View and edit the map of peripherals in the Infineon® AURIX™ model to the hardware peripherals.

Using the Peripheral Configuration tool, you can:

  • View and edit configuration parameters for QSPI peripheral block.

  • Configure the global parameters. To set the group peripheral, select peripheral in Browser > Peripherals > QSPIPeripheral . For more, see Map Tasks and Peripherals Using Hardware Mapping.

  • Check for any conflicts between peripherals.

QSPI Peripheral

Open the QSPI Peripheral Configuration

  • In the Simulink toolstrip, go to Hardware tab and click Hardware Mapping.

    QSPI controller Peripheral

Parameters

expand all

Module selection

Select the QSPI peripheral module 0 through 4 on the hardware board.

SPI protocol configuration

Select the QSPI clock polarity in idle state.

Select the clocking of Tx data.

Select the QSPI data heading in binary numbers.

  • LSB first - the bit furthest to the right (lsb) is moved first from SDO pin followed by the subsequent right bits.

  • MSB first - the bit furthest to the left (msb) is moved first from SDO pin followed by the subsequent left bits.

Select the parity for data bits in SPI transaction.

Enable to configure the QSPI peripheral block to either transmit or receive data at a time. Disable to use for both transmit and receive at a time.

Pin selection

Specify peripheral select input pin for the selected QSPI Peripheral module.

This parameter is read-only.

Select serial clock Pin for SPI transaction.

This parameter is read-only.

Specify pin number to receive serial data from QSPI Controller module.

This parameter is read-only.

Specify pin number to send serial data to QSPI Controller module

Pin configuration

Specify input pin pull for the QSPI pin.

Specify drive strength for the QSPI pin.

Specify voltage level for QSPI pin.

Select the pin speed for QSPI.

Events

Enables the QSPI transmit FIFO interrupt.

Note

Enabling this parameter, expect that the data is handled through interrupts. Therefore it is mandatory to use QSPI Peripheral block (Transfer mode as SPI Transmit) or QSPI Controller (Transfer mode as SPI Transmit or SPI Transmit and Receive) block during the events.

This parameter is read-only.

Select one of these operation modes for transmit buffer:

  • Single Move — Select this mode to generate an interrupt to refill the transmit buffer as soon as there is a free element.

  • Batch Move — Select this mode to generate an interrupt if the FIFO level of Tx data exceeds above programmed threshold.

Dependencies

To enable this parameter, select the TxFifo event parameter.

Specify FIFO level for TxFifo event.

Dependencies

To enable this parameter, select the TxFifo event parameter.

Enables the QSPI receive buffer interrupt.

Note

Enabling this parameter, expect that the data is handled through interrupts. Therefore it is mandatory to use QSPI Peripheral block (Transfer mode as SPI Receive) or QSPI Controller block (Transfer mode as SPI Receive or SPI Transmit and Receive) during the events.

This parameter is read-only.

Select one of these operation modes for receive buffer:

  • Single Move — Select this mode to generate an interrupt to fetch the received element as soon as possible.

  • Batch Move — Select this mode to generate an interrupt if the filling level rises above the programmed threshold.

Dependencies

To enable this parameter, select the RxFifo event parameter.

Specify FIFO level for RxFifo event.

Dependencies

To enable this parameter, select the RxFifo event parameter.

Enables the QSPI error event.

Note

Enabling this parameter, expects that the data is handled through interrupts. Therefore it is recommended to use QSPI block (SPI receive or transmit as transfer mode) during the events.

Version History

Introduced in R2024a