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Floating point tolerance check

Specify the floating-point tolerance check option

Since R2024a

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Model Configuration Pane: Test Bench

Description

When you generate HLS code from your MATLAB® algorithm containing floating-point types, specify the floating-point tolerance strategy option.

Dependencies

Generate test bench enables this parameter. Enable this parameter by clicking Generate Test Bench in the Verification > Verify with HLS Test Bench > Output Settings pane of the HDL Workflow Advisor.

Settings

Relative Error (default) | ULP Error
Relative Error

This is the default option. When you verify the generated code by using HDL Testbench, HDL Coder™ checks for the floating-point tolerance based on the relative error.

ULP Error

When you verify the generated code by using HLS Testbench, HDL Coder checks for the floating-point tolerance of the native floating-point library or the floating-point target library that your design mapped to based on the ULP error.

Examples

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Open Live Script

For example, this MATLAB® code configures the HDL configuration object for High Level Synthesis and uses mlhdlc_sfir_tb as the test bench to verify the generated code. It also specifies the FPToleranceStrategy as ULP Error and sets the FPToleranceValue to 1.

% Create HDLConfig object and set the workflow as "High Level Synthesis"
cfg = coder.config("hdl");
cfg.Workflow = "High Level Synthesis";
 
% Test bench options
cfg.TestBenchName = "mlhdlc_sfir_tb";
cfg.GenerateHDLTestBench = true;
 
% Specify the FPToleranceStrategy as "ULP Error"
cfg.FPToleranceStrategy = "ULP Error";
 
% Specify the FPToleranceValue as an integer for "ULP Error" strategy
cfg.FPToleranceValue = 1;
 
codegen -config cfg mlhdlc_sfir -report
### Begin HLS Code Generation
### Working on mlhdlc_sfirClass.hpp as mlhdlc_sfirClass.hpp.
### Working on mlhdlc_sfirModule.hpp as mlhdlc_sfirModule.hpp.
### Generating Resource Utilization Report resource_report.html.

### Begin TestBench generation.
Code generation successful.

Figure mlhdlc_sfir_tb_plot contains 3 axes objects. Axes object 1 with title Input Signal (with noise), xlabel Time (ms), ylabel Amplitude contains an object of type line. Axes object 2 with title Output Signal (filtered), xlabel Time (ms), ylabel Amplitude contains an object of type line. Axes object 3 with title Input and Output Signals (Frequency domain), xlabel Frequency (Hz), ylabel Amplitude (dB) contains 2 objects of type line. These objects represent FilterIn, FilterOut.

### Collecting data...
### Begin HDL test bench file generation with logged samples
### Generating test bench data file: /tmp/Bdoc24b_2725827_3889709/tp5bfc976e/hdlcoder-ex34814788/codegen/mlhdlc_sfir/hdlsrc/x_in.dat.
### Generating test bench data file: /tmp/Bdoc24b_2725827_3889709/tp5bfc976e/hdlcoder-ex34814788/codegen/mlhdlc_sfir/hdlsrc/y_out_expected.dat.
### Generating test bench data file: /tmp/Bdoc24b_2725827_3889709/tp5bfc976e/hdlcoder-ex34814788/codegen/mlhdlc_sfir/hdlsrc/delayed_xout_expected.dat.
### Generating test bench file: mlhdlc_sfirClass_tb.hpp
### Generating test bench module file: mlhdlc_sfirModule_tb.hpp
### Generating HDL Conformance Report mlhdlc_sfir_hdl_conformance_report.html.
### HDL Conformance check complete with 0 errors, 0 warnings, and 0 messages.
### Code generation successful: To view the report, open('codegen/mlhdlc_sfir/hdlsrc/html/report.mldatx')

Recommended Settings

No recommendations.

Programmatic Use

Parameter: FPToleranceStrategy
Type: character vector
Value: "Relative Error" | "ULP Error"
Default: "Relative Error"

Version History

Introduced in R2024a