Logic
R2026bLogic gates for integrated circuits, such as CMOS AND, CMOS OR,
and CMOS NOT
Produce a single logic output by combining logic gates that implement Boolean functions.
Simscape Blocks
![]() | CMOS AND | Behavioral model of CMOS AND gate |
![]() | CMOS Buffer | Behavioral model of CMOS Buffer gate |
![]() | CMOS NAND | Behavioral model of CMOS NAND gate |
![]() | CMOS NOR | Behavioral model of CMOS NOR gate |
![]() | CMOS NOT | Behavioral model of CMOS NOT gate |
![]() | CMOS OR | Behavioral model of CMOS OR gate |
![]() | CMOS XOR | Behavioral model of CMOS XOR gate |
![]() | D Flip-Flop | Behavioral model of D flip-flop (Since R2024a) |
![]() | D Latch | Behavioral model of D latch (Since R2024a) |
![]() | S-R Latch | Behavioral model of S-R Latch |
![]() | Schmitt Trigger | Behavioral model of Schmitt trigger |
Topics
- Parameterize Blocks from Data Sheets
Overview of techniques used to specify block parameters to match the data from manufacturer data sheets.
- Selecting the Output Model for Logic Blocks
Explore the two output models available for logic blocks.
- Plot Basic Input-Output Voltage Characteristics of Logic Gates
Plot basic input-output voltage characteristics of logic gates based on block parameter values.










