FPGA design (debug)

Include AXI interconnect monitor

Gather performance diagnostics of the AXI memory interconnect such as data throughput, latency, and number of bursts executed. You can use the AXI master or a processing system on the target to gather the information. When using an AXI master, a host-based script can plot the data using MATLAB^®. These figures can then be compared against the simulation results.

Settings

Default: off

Trace capture depth

Maximum number of Trace entries to be logged in trace mode, choose the depth in powers of 2.

Settings

Default: 1024