F2807x/F2837xD/F2837xS/F28004x/F2838x/F2800xx CMPSS

Compare two input voltages on comparator pins

Since R2020a

• 

Libraries:
C2000 Microcontroller Blockset / F280013x
C2000 Microcontroller Blockset / F280015x
C2000 Microcontroller Blockset / F28002x
C2000 Microcontroller Blockset / F28003x
C2000 Microcontroller Blockset / F28004x
C2000 Microcontroller Blockset / F2807x
C2000 Microcontroller Blockset / F2837xD
C2000 Microcontroller Blockset / F2837xS
C2000 Microcontroller Blockset / F2838x / C28x
C2000 Microcontroller Blockset / F28p65x
C2000 Microcontroller Blockset / F28p55x

Description

The Comparator Subsystem consists of two modules, Comparator High (COMPH) and Comparator Low (COMPH). Each module generates a high digital output when the voltage on the first input pin (positive input) is greater than the voltage on the second input pin (negative input). And each module generates a low digital output when the voltage on the first input pin (positive input) is less than the voltage on the second input pin (negative input).

The second input pin can either be the external pin or the DAC module.

Ports

Input

DAC — DAC module

scalar

12-bit DAC reference value is used for the second input pin of the comparator.

The DAC range is between 0 to 4095. Any value outside the range is saturated.

Dependencies

The DAC port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to DAC module

• Specify DAC/RAMP parameter(s) Via is set to Input port

REF — Ramp reference value

scalar

Ramp reference value used by the ramp generator to create a ramp reference voltage for the second input pin of the comparator.

The REF value should be in the range 0 to 65535. Any value outside the range is saturated.

Dependencies

The REF port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) Via is set to Input port

• This port is available only for the COMPH module.

DEC — RAMP decrement value

scalar

Ramp decrement value used by the ramp generator to create a ramp reference voltage for the second input pin of the comparator.

DEC range is between 0 to 65535. Any value outside the range is saturated.

Dependencies

The DEC port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) Via is set to Input port

• This port is available only for the COMPH module.

DLY — RAMP delay value

scalar

Ramp delay value used by the ramp generator to create a ramp reference voltage for the second input pin of the comparator.

DLY range is between 0 to 8192. Any value outside the range is saturated.

Dependencies

The DLY port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) Via is set to Input port

• This port is available only for the COMPH module.

LCLR — Latch clear

scalar

Signal to clear the comparator latched output. Any value greater than 0 will clear the latch output.

Dependencies

The latch clear port appears only when Enable latch clear parameter is selected.

Output

STS — Comparator status output

scalar

The comparator module outputs 1, if the voltage on the first input pin is greater than the second input pin. Otherwise, it outputs 0.

LTH — Comparator latch

scalar

The comparator latch output is the tripped state of the CMPSS comparator after it is digitized and qualified by a digital filter.

The latched value can either be cleared by the software or PWMSYNC.

Dependencies

To enable this port, select the Enable latch output parameter.

Parameters

Comparator module — Indicates which module to use

CMPSS1_COMPH (default) | CMPSSx_COMPL | CMPSSx_COMPH | where x ranges from 1 to 8

Select which comparator module should be configured to output the comparison result.

Note

Number of modules available will vary for different processors.

Second input — Source of second input pin

External pin (default) | Internal DAC

The voltage source of second input pin (negative input pin), specified as either External pin or Internal DAC.

DAC source select — Source of internal DAC

DAC module (default) | RAMP module

Select source of the internal DAC to generate voltage for the negative input pin, specified as either DAC module or RAMP module.

Dependencies

This parameter is available only for the COMPH module.

Specify DAC/RAMP parameter(s) via — Configure source DAC/RAMP value source

Dialog (default) | Input port

Select if the DAC or RAMP values are to be specified via the input port or from the dialog.

When you select input port, the block generates input ports for the comparator module.

When you set DAC source select parameter to DAC module, the block generates DAC port and when DAC source select is set to RAMP module it generates REF, DEC, and DLY port.

Parameter dependency

This parameter is available only for the COMPH module.

DAC value (DACH) — Specify DAC value

0 (default)

Specify the DAC value for internal DAC to generate the voltage on the negative input.

DAC initial value — Specify DAC initial value

0 (default)

Specify the DAC initial value for internal DAC to generate the voltage on the negative input.

Dependencies

The DAC port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to DAC module

• Specify DAC/RAMP parameter(s) Via is set to Input port

RAMP reference value — Specify RAMP reference value

0 (default)

The RAMP reference value is in the range 0 to 65535. Any value outside the range is saturated.

The RAMP generator starts to decrement from the reference value.

Dependencies

The REF port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) Via is set to Dialog

• This port is available only for the COMPH module.

RAMP decrement value — Specify RAMP decrement value

0 (default)

The RAMP decrement value is in range 0 to 65535. Any value outside the range is saturated.

The RAMP generator decrements the RAMP reference value in steps of decrement value.

Dependencies

The DEC port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) Via is set to Dialog

• This port is available only for the COMPH module.

RAMP delay value — Specify RAMP delay value

0 (default)

The RAMP delay value is in range 0 to 8192. Any value outside the range is saturated.

The RAMP generator waits for the delay value before it starts to decrement the RAMP reference value in steps of RAMP decrement value.

Dependencies

The DLY port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) via is set to Dialog

• This port is available only for the COMPH module.

RAMP initial reference value — Specify RAMP initial reference value

0 (default)

The RAMP initial reference value is in the range 0 to 65535. Any value outside the range is saturated.

The RAMP generator starts to decrement from the reference value.

Dependencies

The REF port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) Via is set to Input port

• This port is available only for the COMPH module.

RAMP initial decrement value — Specify RAMP decrement value

0 (default)

The RAMP initial decrement value is in range 0 to 65535. Any value outside the range is saturated.

The RAMP generator decrements the RAMP reference value in steps of decrement value.

Dependencies

The DEC port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) Via is set to Input port

• This port is available only for the COMPH module.

RAMP initial delay value — Specify RAMP delay value

0 (default)

The RAMP initial delay value is in range 0 to 8192. Any value outside the range is saturated.

The RAMP generator waits for the delay value before it starts to decrement the RAMP reference value in steps of RAMP decrement value.

Dependencies

The DLY port appears only when parameter:

• Second input is set to Internal DAC

• DAC source select is set to RAMP module

• Specify DAC/RAMP parameter(s) via is set to Input port

• This port is available only for the COMPH module.

Enable latch output — Comparator latch output

off (default) | on

The latched value of the digital filter output of the comparator.

Select this parameter to enable the LTH port.

Enable latch clear — Clear comparator latch value

off (default) | on

Latch clear signals to clear the comparator latch status signal. Any value greater than 0 will clear the latch signal.

Select this parameter to enable the LCLR port.

Sample time — Frequency at which data is read from comparator

0.1 (default)

Use this parameter to specify the time interval between samples. To inherit sample time from an upstream block, set this parameter to -1.

Configuration of GPIO as Analog Pins

For TI F280013x and TI F280015x processors the following tables provides the mapping of GPIO pins which can be used as the analog pins for ADC and CMPSS blocks.

GPIO	ADC		CMPSS
	Module	Channel	Module	Input
GPIO12	A	20
	C	20
GPIO13	A	19
	C	19
GPIO20	A	17
	C	17
GPIO21	A	18
	C	18
GPIO28	A	16
	C	16
GPIO224	A	2	1	Positive
	C	9
GPIO226	C	6	3	Positive
GPIO227	A	9	2	Positive
	C	8	4	Positive
GPIO228	A	6	1	Positive
GPIO230	A	10	2	Negative
	C	10
GPIO242	A	3	3	Negative
	C	5

For TI F28P65x processors the following tables provides the mapping of GPIO pins which can be used as the analog pins for ADC and CMPSS blocks.

GPIO	ADC		CMPSS
	Module	Channel	Module	Input
GPIO198	B	31	11	Positive
	C	7
GPIO199	B	24	6	Positive
	C	0	6	Negative
GPIO200	B	25	6	Positive
	C	1
GPIO201	C	9	11	Positive
GPIO202	C	8	10	Positive
GPIO203	B	30	10	Positive
	C	6
GPIO204	B	25	2	Positive
	C	9	5	Negative
GPIO205	B	28	5	Positive
	C	4	10	Negative
GPIO206	B	27	3	Positive
	C	3	6	Negative
GPIO207	A	30	7	Positive
	B	6	7	Negative
GPIO208	A	31	3	Negative
	B	7	7	Positive
GPIO209	A	6	7	Positive
GPIO210			4 and 9	Positive
	A	7	7	Negative
GPIO211	A	8	8	Positive
	C	24
GPIO212	A	9	5	Positive
	C	25	8	Negative
GPIO213	A	10	8	Positive
	C	26	8	Negative
GPIO214	A	11	8	Positive
	C	27
GPIO215	A	28	5	Positive
	B	4	5	Negative
GPIO216	A	25	5	Positive
	B	5
GPIO217	B	8	2	Positive
	C	28	10	Negative
GPIO218	B	9	2	Positive
	C	29	9	Negative
GPIO219	B	10	4	Positive
	C	30	4	Negative

These pins are configured as analog pins if ADC or CMPSS blocks utilize them. Ensure that a GPIO pin is not used as both digital and analog pin. For example, if GPIO12 cannot be used in digital input or digital output block and as ADCA input channel 20.

Note

In some C28x processors, the GPIO pin selection for CMPSS blocks is done by configuring CMPHPMXSEL, CMPLPMXSEL, CMPHNMXSEL, and CMPLNMXSEL registers. Use the Register Read/Write block in Initialize function subsystem to write to these registers. For example, to use AIO233 as CMPSS1 Positive input for COMPH and COMPL, use Register Read/Write block in Initialize function subsystem to write to 3 to AnalogSubsysRegs.CMPHPMXSEL.bit.CMP1HPMXSEL and AnalogSubsysRegs.CMPLPMXSEL.bit.CMP1LPMXSEL bits.

Version History

Introduced in R2020a