Reference Design
R2026bReference design to integrate with generated IP core
Since R2023b
Model Configuration Pane: Target
Description
The Reference Design model configuration parameter specifies the reference design to integrate with the generated IP core. The available reference designs depend on the value of the Target Platform parameter. To learn more about creating a custom board and reference design, see Board and Reference Design Registration System.
After you select a reference design, click More info to open
descriptive information about the reference design in MATLAB® as an HTML page or in the default browser or application, depending on the
input type you specify in the ReferenceDesignInfo property of the
hdlcoder.ReferenceDesign object
associated with the reference design. If the ReferenceDesignInfo
property is empty HDL Coder™ opens a HTML page in MATLAB that includes reference design metadata, such as board, synthesis tool,
clock, interface, plugin, and author information.
Settings
Default system (default) | Default system with Shared Memory Access | Default system with AXI4-Stream interface | Default video system(requires HDMI FMC module) | Default System with SoC BlocksetTips
To set this property, use the functions hdlset_param or makehdl:
Pass the parameter as an argument to the
makehdlfunction.makehdl("sfir_fixed/symmetric_fir","ReferenceDesign","Default system with AXI4-Stream interface");
Set the parameter on the model by using
hdlset_param, then generate the HDL code by usingmakehdl.hdlset_param("sfir_fixed","ReferenceDesign","Default system with AXI4-Stream interface"); makehdl("sfir_fixed/symmetric_fir");
Recommended Settings
No recommendations
Programmatic Use
Parameter:
ReferenceDesign |
| Type: character vector | string |
Value:
"Default system" | "Default system with Shared Memory
Access" | "Default system with AXI4-Stream
interface" | "Default video system(requires HDMI FMC
module)" | "Default System with SoC
Blockset" |
Default:
Default system |
Version History
Introduced in R2023b