Signal Integrity Toolbox™ provides functions and apps for designing high-speed serial and parallel links. You can generate experiments covering multiple parameters, extract design metrics, and visualize waveforms and results. You can predict operating margins and link performance by analyzing transmitter, receiver, and channel interactions.
The toolbox supports standard-compliant IBIS-AMI models for statistical and time-domain simulation to analyze equalization and clock recovery. You can describe the channel using multiport S-parameter data, IBIS, HSPICE, and analytical models.
Signal Integrity Toolbox lets you analyze waveforms and eye diagrams and measure channel quality while observing effects such as ISI, jitter, and noise. You can analyze the channel in the frequency domain for insertion loss, return loss, and crosstalk, and verify compliance with industry standards including IEEE 802.3, OIF, PCIe, and DDR.
Before layout, you can evaluate tradeoffs and optimize parallel and serial links for cost, performance, reliability, and compliance. You can then perform post-layout verification of the system and correlate simulation results with measurement data.
Learn the basics of Signal Integrity Toolbox
Design high speed serial links such as PCIe, USB, and Ethernet
Design parallel links such as DDR
Implement industry-standard applications (PCI, DDR, CEI, USB and more) using prepackaged signal integrity kits