Main Content

Deep Learning

Integrate deep learning processors with video streaming designs

SoC Blockset™ Support Package for Xilinx® Devices provides two fixed reference designs for integrating deep learning processors with your streaming video designs.

  • Integrate a DL processor with custom preprocessing logic.

  • Connect live HDMI video to custom preprocessing logic, a DL processor, and custom postprocessing code, and then return the modified HDMI video output from the board.

Both designs use AXI manager interfaces, DDR memory, and an AXI4-Stream data path. Use the IP core generation workflow to generate code and deploy your design to an SoC device.