Multicore External Mode on TI F2838x
R2026bMulticore External Mode enables signal monitoring and parameter tuning on multiple cores of a Texas Instruments® F2838x processor through a single Ethernet connection. On TI TMS320F28388D devices, the CM4 core acts as an XCP communication gateway between the host computer and the CPU1 and CPU2 C28x cores.
The host computer communicates with the CM4 core over TCP/IP Ethernet. The CM4 core routes External Mode communication packets to CPU1 and CPU2 through Inter-Processor Communication (IPC) channels and also supports signal monitoring and parameter tuning for its own application. This architecture enables simultaneous monitoring and tuning across all processor cores without requiring separate host communication connections for CPU1 and CPU2.
For successful multicore External Mode operation:
Build the CM4 model before you build the CPU1 and CPU2 models.
Start External Mode on the CM4 model before you start External Mode on CPU1 or CPU2.
Use unique TCP ports for each core.
Use matching IPC channel pairs between the CM4 gateway model and the C28x models.
For a step-by-step workflow that demonstrates how to configure, build, deploy, monitor, and tune multicore applications, see Get Started with Multicore External Mode on TI F2838x.
Communication Architecture
The default communication configuration uses the following TCP ports:
CM4: 17725
CPU1: 17726
CPU2: 17727
The default IPC channel configuration is:
CM4 and CPU1: IPC channels 0 and 1
CM4 and CPU2: IPC channels 2 and 3
The CM4 core serves as the communication gateway for all External Mode connections. CPU1 and CPU2 communicate with the host computer through IPC forwarding implemented by the CM4 core.
Host PC (Simulink External Mode)
|
TCP/IP Ethernet
|
v
CM4 (ARM Cortex-M4) - Port 17725
XCP Communication Gateway
/ \
IPC Ch 0/1 IPC Ch 2/3
/ \
v v
CPU1 (C28x DSP) CPU2 (C28x DSP)
Port 17726 Port 17727Note
The RX and TX IPC channel values configured in each C28x model must match the corresponding IPC channel settings in the CM4 gateway model. CPU1 and CPU2 must use unique IPC channel pairs.
Model Configuration Settings
Configure each model for multicore External Mode as required. To do this, in the Simulink toolstrip, navigate to Modeling > Model Settings > Hardware Implementation > Target hardware resources > External mode.
| Setting | CM4 | CPU1 | CPU2 |
|---|---|---|---|
| Hardware Board | TI F2838x | TI F2838x | TI F2838x |
| Processing Unit | CortexM4 | c28xCPU1 | c28xCPU2 |
| External Mode Transport | XCP on TCP/IP | XCP on TCP/IP (using IPC forwarding) | XCP on TCP/IP (using IPC forwarding) |
| XCP Communication Gateway | Enabled | — | — |
| TCP Port | 17725 | 17726 | 17727 |
| IPC Channel (CM4 → C28x) | 0 (CPU1), 2 (CPU2) | 0 | 2 |
| IPC Channel (C28x → CM4) | 1 (CPU1), 3 (CPU2) | 1 | 3 |
| Boot from Flash | Yes | Yes | Yes |
| Ethernet IP Address | 192.168.0.12 | — | — |
Network Requirements
When modifying the default communication settings, follow these requirements:
IPC channel settings in each C28x model must match the corresponding CM4 gateway settings.
CPU1 and CPU2 must use different IPC channel pairs.
IPC channel values must be in the range 0 through 7.
Each core must use a unique TCP port.
TCP port values must be in the range 1024 through 65535.
TCP Send and TCP Receive blocks in the CM4 model must not use ports reserved for External Mode communication.
IPC Channel and Port Configuration
The models use default IPC channels and TCP ports. Change these settings only if your application requires different channel or port assignments.
To change IPC channels or TCP ports:
Open the model.
In the Simulink Toolstrip, on the Modeling tab, click Model Settings.
In the Configuration Parameters dialog box, navigate to Hardware Implementation > Target hardware resources > External mode.
Check Specify IPC channel numbers to change IPC channels, or check Specify TCP/IP port to change ports.
Update the IPC channel or TCP port settings.
When you change these settings, follow these requirements:
The IPC channel settings in each C28x model must match the corresponding CM4 gateway settings.
CPU1 and CPU2 must use different IPC channel pairs.
IPC channel values must be in the valid range
0through7.Each core must use a unique TCP port.
TCP ports must be in the valid range
1024through65535.TCP Send/Receive blocks in the CM4 model must not use ports reserved for External Mode.
See Also
Signal Monitoring and Parameter Tuning over XCP on TCP/IP | Communication Between Cores Using IPC Blocks