How to check into simulink test sequence a local signal into the model

I would like to check the state of the FSM into a stateflow chart without creating an output variable. And in a similar way some local variables.

I need to check it with verify statement into a test sequence block.

I tried using data store memory and simulink signal but i have problem with red/write consequentially action. I know i could remove that error from model configuration but i want to mantain to be compliant with my workflow.

[Pat Canny]

Hi @Claudio Rosso - have you looked into Observers? https://www.mathworks.com/help/sltest/ug/access-model-data-wirelessly-by-using-observers.html

[Claudio Rosso]

The solution was really what i was looking for, unfortunately,,it seems that i can't use it with library blocks.

Is there any similar solution or workaround i Can use for it?

Thank you for your reply.