Device arm_dap_0 is not programmable with FPGA in the loop tutorial.
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Eduardo Flores
el 29 de Nov. de 2020
Comentada: 振款 陈
el 14 de Ag. de 2024 a las 5:28
Hello all, i'm following the FPGA in the loop tutorial and i'm stuck with the following error: Device arm_dap_0 is not programmable.
![](https://www.mathworks.com/matlabcentral/answers/uploaded_files/434058/image.png)
I created a custom board file using the specs given by digilent. I have an Arty Z7020.
![](https://www.mathworks.com/matlabcentral/answers/uploaded_files/434063/image.png)
I'm working on Ubuntu 18.04.05 LTS and using a micro-USB cable connected to the progUART port of my board. The blue jumper (don't know if that is the name) is connected in JTAG configuration.
I have already downloaded the VHDL verifier, and generation for Xillinx add ons. And currently run the Vivado WebPAck with Vitis on a student license.
Thanks in advance!
2 comentarios
振款 陈
el 14 de Ag. de 2024 a las 5:28
ZYNQ FPGA-in-the-loop JTAG的设置
在用Matlab/Simulink开发FPGA时,用FIL进行程序的验证是非常有效的。
我买的是正点原子的开发板,用FilWizard工具在Matlab创建自己的FPGA设备时遇到了无法下载程序,和下载程序后无法运行的问题。
多次尝试后,确定了是Jtag参数设置的问题。
JTAG chain positon 选择 2
IR length before 选择 4
IR length after 选择 0
我觉得zynq系列的芯片都可以用这个配置进行连接。
Respuesta aceptada
Aman Vyas
el 16 de Dic. de 2020
Hi,
Arty_Z7020 is the member of zynq family and this feature is not supported for HDL_verifier workflow as of now.
You can use other such configurations which supports as of now.
Pre release can be seen here which will be added in later features:
Hope it helps !
Más respuestas (1)
Ahmad Reda
el 2 de Dic. de 2020
I am trying to deploy DNN model on ZedBorad and I am getting the same error.
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