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When it comes to interlock time (or dead-time) between gate signals of two complementary semiconductor devices, we tend to assume that this is a must to avoid shoot-through. Is this assumption true? What are your thoughts about this? You can check the conclusions of the Workshop “Interlock Times—Necessary, Useful, or Not Needed at All?” organized by IEEE Power Electronics Society. Simscape Electrical can be used to simulate the shoot-through currents and power losses in semiconductor devices.