FPGA Implementation of Gray Scale based the Image Dilation Morphological Operation using HDL coder

In this submission the basic morphological operation called dilation has been implemented.

Here i have implemented the basic morphological operator called "Dilation" on gray scale image using HDL coder.The main motivation behind this work to generated the VHDL code which can be used for programming the FPGA using the matlab algorithm of the image dilation.Here i have used the simple 3x3 structuring element.The main concept in thr image dilation is to find the maximum pixel value in the neighboring pixels.