Reference Design Information Report
R2026bWhen you generate a custom IP core, HDL Coder™ generates an HTML report that describes the selected reference design. To review the target board, synthesis tool, clock and reset configuration, interfaces, reference design plugin, and author information, use the report.
The report organizes the available reference design metadata into summary sections. The information that each section displays depends on the metadata defined by the selected reference design.
Board Summary
The Board Summary section shows the target platform and board part information for the reference design that you use during custom IP core generation. This section includes details about the target platform, board part, device family, device name, and package.
Tool Summary
The Tool Summary section shows the synthesis tool configuration for the reference design. This section includes details about the synthesis tool, supported synthesis tool versions, block design name, and custom block design Tcl file.
Clock Summary
The Clock Summary section shows the clock and reset configuration for the reference design. This section includes details about the clock module, clock port, reset port, clock and reset connections, clock number, clock frequency, and supported clock frequency range.
Interfaces Summary
The Interfaces Summary section lists the interface types that the reference design uses.
Plugin Summary
The Plugin Summary section shows the plugin information for the reference design. This section includes details about the plugin file, plugin package, and plugin path.
Author Summary
The Author Summary section shows the contact information for the reference design author. This section includes details about the author name, website, email address, and phone number.
Fields are empty if the selected reference design does not provide the corresponding author information.
