Resolve Undecided Objective Statuses Caused by Possible Modeling Errors

Issue

These undecided objective statuses might be due to possible modeling errors in the model.

• Undecided Due to Runtime Error — Simulink^® Design Verifier™ is not able to decide the objectives due to run-time errors that occurred during simulation of the test cases. When a test input triggers a run-time error, the simulation cannot proceed, and Simulink Design Verifier cannot generate coverage data for the affected objectives.

  For example, when you run test generation analysis on a MATLAB function block where the index value exceeds the valid range, a warning in the Diagnostic Viewer indicates the model element that causes this error during the simulation.

  Simulation error during testcase or counterexample validation: Index exceeds array dimensions. Index value -49 exceeds valid range [1-5] for array 'a'.

• Undecided Due Array Out of Bounds — A possible out-of- bounds array access may prevent Simulink Design Verifier from deciding an objective. After test generation analysis, the Diagnostic Viewer shows these warnings:

  Warning: Simulink Design Verifier encountered an out of bounds array access during analysis and might not have generated test cases for some objectives. Please consider running Design Error Detection and looking for out of bounds access. For more details, see the analysis report.

  Warning: Out of bound array access encountered during analysis. Please consider running Design Error Detection and looking for Out of bound array access.

• Undecided Due to Division-by-zero — Your model contains elements that can cause division-by-zero errors.

Possible Solutions

Depending upon the type of undecided objectives you encountered during the analysis, try one of these solutions.

Possible Solutions for Undecided Due to Run-time Error Status

For test generation, the primary objective is to maximize model coverage. During test generation analysis, Simulink Design Verifier attempts to generate test cases even if run-time errors are present. If a run-time error occurs, the error indicates that no test case could be found that avoids the modeling error. This suggests that the objective may not be covered unless the run-time error is addressed. To achieve coverage, resolve the modeling error first.

In design error detection, if an objective is influenced by an upstream error, focus on resolving the upstream error before addressing the objective. When generating counterexamples for design errors, Simulink Design Verifier does not attempt to avoid the error, as the goal is to demonstrate the presence of the error.

Observe these common modeling patterns that cause run-time errors during Simulink Design Verifier analysis:

Source of run-time error	Description
Diagnostic for default case parameter in Multi-Port Switch block is set to error.​	During Simulink Design Verifier analysis, there may be situations where reaching certain downstream blocks is possible only by passing through the default port. When this situation arises, the analysis cannot achieve coverage objectives for those downstream blocks because using the default port triggers a run-time error. In such cases, review your model to determine whether use of the default port is a valid part of the design. If not, update the switch configuration or input mappings to prevent unintentional use of the default port.
The model configuration parameter Detect overflow is set to error.​	If Detect overflow is set to error, any arithmetic operation that exceeds the representable range of a data type triggers a run-time error. This error can prevent test case generation or coverage. To address this issue, investigate the specific operations causing the overflow, and adjust data types, input ranges, or add logic to prevent overflow conditions. Running design error detection analysis can help you identify these problems early.
In the Model Data Editor, the Parameters object is set to error.	Enabling Parameters option in the Model Data Editor can result in run-time errors if parameter values fall outside the minimum or maximum limits defined by the corresponding Simulink.Parameter object. This issue is often due to incorrect or overly restrictive range settings. Review your parameter configurations to make sure all specified values are within the allowable range. Adjust the minimum and maximum values as necessary to prevent run-time errors during analysis.

To localize the cause of run-time error, ​highlight the model element from Simulink canvas and Click Error detail in the Results Summary window. Then, click Inspect to use Model Slicer to view the path leading to the given objective. For more information, see Highlight Analysis Results on Model.

For an example, see Address Undecided due to Runtime Error in Simulink Design Verifier Analysis.

Possible Solutions for Undecided Due Array Out of Bounds or Undecided Due to Division by Zero status

If you encounter the Undecided Due to Array Out of Bounds or Undecided Due to Division-by-zero objective status during the analysis, try one of these solutions:

• Run design error detection and look for out of bounds access. For more information on design error detection, see Design Error Detection Analysis using Simulink Design Verifier.

• Constrain model inputs by adding sldv.assume function to keep input values within valid ranges. For division operations, bound the inputs away from zero or rewrite the logic to include protective checks against division by zero.

• Run the associated design error checks and address the cause of the division-by-zero error. For more information on design error checks, see Check For Design Errors using the Model Advisor.

• Run design error detection analysis by enabling relevant options for array out of bounds and division by zero​.

• Introduce minimum and maximum constraints on design inputs to make sure that ranges are set properly. This eliminates the error that occurs when inputs are unconstrained.