Is HDL Coder able to do falling clock edge trigger?

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legendbb
legendbb el 13 de Nov. de 2013
Respondida: Tim McBrayer el 13 de Nov. de 2013
Looking at DDR mode, don't know if HDL Coder is capable of handling such.
Please comment, thanks,

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Tim McBrayer
Tim McBrayer el 13 de Nov. de 2013
HDL Coder cannot generate DDR code. It is planned for R2014a to support specifying either the positive or negative clock edge to use, but even then only one edge may be used at once. This single-edge limitation is due to the simple fact that Simulink semantics to not support DDR-style semantics.

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