To increase the sampling rate of the DAC on the TI F28379D microcontroller in Simulink, you can follow any of the following steps:
1. Adjust the Base Sample Time in Simulink:
The DAC output update rate is governed by the base sample time of your Simulink model. To increase the sampling rate, reduce the base sample time. For example, setting the base sample time to 10 µs corresponds to a 100 KHz sampling rate. Follow these steps
- Open your Simulink model.
- Navigate to Model Settings:
- Click on the Modelling tab.
- Select Model Settings.
- In the Solver pane:
- Set Type to Fixed-step.
- Choose an appropriate Solver (e.g., discrete).
- Set the Fixed-step size to your desired sample time.
2. Configure the DAC Block Sample Time: Ensure that the DAC block's sample time matches the base sample time or is a multiple of it.
Steps:
- Double-click on the DAC block in your model.
- In the block parameters, set the Sample time to the desired value.
3. Leverage CLA for Offloading Tasks: The Control Law Accelerator (CLA) can offload time-critical tasks from the main CPU, allowing for higher DAC update rates.
Steps:
- In your model, identify tasks suitable for offloading to the CLA.
- Use the CLA Task blocks to define these tasks.
- Ensure proper configuration of the CLA in the model settings.
Note: Ensure that your hardware setup and signal conditioning are adequate to handle the increased sampling rates.
You can refer to this MathWorks Video Tutorial to know how to work with DACs:
I hope this helps!