- Pat Canny (Simulink Design Verifier Product Manager)
Facing issue in test generation using simulink test through matlab commands
3 visualizaciones (últimos 30 días)
Mostrar comentarios más antiguos
Facing issue while generating tests using command as shown in screenshot. This command is working fine on matlab 2020b update6 version but its giving below error on matlab 2021b update2 version. When I am trying to generate tests manually using simulink design verifier then its generating successfully on same model but giving below error while generating tests using below command.
Please let me know the solution of the issue.
![](https://www.mathworks.com/matlabcentral/answers/uploaded_files/886865/image.png)
3 comentarios
Devendra Bhave
el 9 de Feb. de 2022
Editada: Devendra Bhave
el 9 de Feb. de 2022
Try disabling the harness creation. Run the following code and let us know whether it works.
tcObj = sltest.testmanager.createTestForComponent('TestFile', tf, ...
'SLDVTestGeneration', true, ...
'Component', Schedular_Name, ...
'CreateHarness', false, ... % Disable the harness creation to analyze the component directly
'TestType', 'equivalence', ...
'Simulation1Mode', 'Normal', ...
'Simulation2Mode', 'Software-in-the-Loop (SIL)'...
);
Respuestas (1)
Devendra Bhave
el 9 de Feb. de 2022
It is a bit difficult to establish the root cause of the error based on the above information. I suggest you consult MathWorks technical support.
1 comentario
Ver también
Categorías
Más información sobre Review Analysis Results en Help Center y File Exchange.
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!