Simple voltage divider using rftoolbox

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cas_circuit = rfckt.cascade('Ckts',{rfckt.seriesrlc('R',1), rfckt.shuntrlc('R',1)});
freq = [0:0.01e9:10e9];
analyze(cas_circuit, freq)
cas_circuit.AnalyzedResult
sp = sparameters(cas_circuit.AnalyzedResult)
rfplot(sp,'abs')
z0 = cas_circuit.AnalyzedResult.Z0; zS = cas_circuit.AnalyzedResult.ZS; zL = cas_circuit.AnalyzedResult.ZL;
z0 = real(z0); zS = real(zS); zL = real(zL);
%----------------------------------------------------------------------------------------
%at this point we already constructed the circuit, we will need to generate
%the input
difftf = s2tf(sp);
[rationalfunc, errdb] = rationalfit(freq,difftf)
npoles = length(rationalfunc.A);
fprintf('The derived rational function contains %d poles.\n',npoles);
%------------------------------------------------------------------------
freqsforresp = linspace(0,10e9,1001)';
resp = freqresp(rationalfunc,freqsforresp);
figure
subplot(2,1,1)
plot(freq*1.e-9,(abs(difftf)),'r',freqsforresp*1.e-9, ...
(abs(resp)),'b--','LineWidth',2)
title(sprintf('Rational Fitting with %d poles',npoles),'FontSize',12)
ylabel('Magnitude (decibels)')
xlabel('Frequency (GHz)')
legend('Original data','Fitting result')
subplot(2,1,2)
origangle = unwrap(angle(difftf))*180/pi+360*freq'*rationalfunc.Delay;
plotangle = unwrap(angle(resp))*180/pi+360*freqsforresp*rationalfunc.Delay;
plot(freq*1.e-9,origangle,'r',freqsforresp*1.e-9,plotangle,'b--', ...
'LineWidth',2)
ylabel('Detrended phase (deg.)')
xlabel('Frequency (GHz)')
legend('Original data','Fitting result')
%--------------------------------------------------------------------------
ak = [0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1];
Dk = [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1];
numofSR = length(Dk);
out = [];
for k = 1:1000
out = [out,Dk(numofSR)];
newbit = mod(sum(ak.*Dk),2);
Dk(numofSR) = []; Dk = [newbit, Dk];
end
datarate = 1*1e9; % Data rate: 1 Gbps
samplespersymb = 100;
pulsewidth = 1/datarate;
ts = pulsewidth/samplespersymb;
numsamples = 5000;
numplotpoints = 100000;
t_in = double((1:numsamples)')*ts;
%out?
input_signal = out;
input_signal = repmat(input_signal,[samplespersymb, 1]);
input_signal = input_signal(:);
[output_signal,t_out] = timeresp(rationalfunc,input_signal,ts);
if ~isempty(which('commscope.eyediagram'))
if exist('eyedi','var')
close(eyedi)
end
eyedi = commscope.eyediagram('SamplingFrequency',1./ts, ...
'SamplesPerSymbol',samplespersymb,'OperationMode','Real Signal');
% Update the eye diagram object with the transmitted signal
estdelay = floor(rationalfunc.Delay/ts);
update(eyedi,output_signal(estdelay+1:end));
end
max(output_signal)
overSampleRate = round((1/ts)/datarate
  1 Comment
goay chan hong
goay chan hong on 1 Nov 2016
I tried to model a simple voltage divider and expect to get 0.5 V output. But I only get around 0.0377 V. Can anyone help me out? I do not sure what is the problem here.

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Accepted Answer

MathWorks RF & Mixed-Signal Products Team
Hi Goay Chan Hong,
I think you did not take into account the source and load impedance when computing the transfer function from the S-parameters. Moreover I would build the voltage divider network using the "circuit" syntax, as I find it more intuitive.
I would change part of your code to look like the following. Notice that I used option "2" to compute the transfer function.
Hope this helps, with best regards, Giorgia
ckt = circuit('VoltageDivider');
R = 1;
add(ckt,[1 2], resistor(R))
add(ckt,[2 0], resistor(R))
freq = (0:0.01e9:10e9);
setports(ckt,[1 0],[2 0])
S = sparameters(ckt,freq);
rfplot(S,'abs')
difftf = s2tf(S,1e-12,1e12,2);
[rationalfunc, errdb] = rationalfit(freq,difftf);
freqsforresp = linspace(0,10e9,1001)';
resp = freqresp(rationalfunc,freqsforresp);
figure
plot(freq*1.e-9,((difftf)),'r',freqsforresp*1.e-9, ...
((resp)),'b--','LineWidth',2)
ylabel('Magnitude (linear)')
xlabel('Frequency (GHz)')
legend('Original data','Fitting result')

More Answers (1)

goay chan hong
goay chan hong on 8 Nov 2016
Switching to option 2 definitely helps. Thank you for that. Before that, I always get double the voltage of the calculated value. Thanks.

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