Download bit file to Zynq from HDL Coder

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Brent  Jarvis
Brent Jarvis el 28 de Abr. de 2017
Comentada: zhouwb02 el 8 de En. de 2021
Hi,
I am working with HDL Coder. How can I deploy a previously generated bitfile to my ZC706 once I have generated the code using HDL Coder. For some reason it seems like I need to rebuild the bitstream in the HDL Coder Workflow in order to re-deploy the bitfile. Can you help with this?
For instance, I power cycle the Zynq board edit my ARM code and then want to redeploy the same bitfile to the Zynq chip.
Thanks,

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Tao Jia
Tao Jia el 5 de Mayo de 2017
Editada: Tao Jia el 5 de Mayo de 2017
If you know the location of your FPGA programming file, you can always use Vivado to program the FPGA. Also, there is a MATLAB utility function that can do this - run "help filProgramFPGA" in MATLAB to check it out.
Hope this helps, Tao
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Brent  Jarvis
Brent Jarvis el 6 de Jun. de 2017
Editada: Brent Jarvis el 6 de Jun. de 2017
I have begun using Vivado for this task. Thanks for the suggestion. After using the toolchain a bit more, I have realized Vivado will play a big part while implementing and deploying code/bitstreams.
zhouwb02
zhouwb02 el 8 de En. de 2021
From the filProgramFPGA help,
filProgramFPGA('Xilinx Vivado', PROGRAMFILE,CHAINPOSITION)
programs Xilinx FPGA at JTAG chain position CHAINPOSITION using the
programming file PROGRAMFILE and Xilinx Vivado tool.
How to define the CHAINPOSITION value?

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