Hello Community, I am using Simulink HDL Coder with Matlab r2017a. However, I have an implementation of a PI Controller and try to optimize the clockspeed for my FPGA design. But some of the blocks(e.g Multiplier for Kp and KI, atleast it tells me so) to optimize are arranged in a feedback Loop and HDL Coder refuses to insert (adaptive) Pipeline Registers and also delay balancing is not possible for delays in Feedback Loops.
Do you have a nice and accurate workaround for doing speed optimization in feedback-Loops (in General)?
Thank you, Lars