HDL Coder™ Support Package for Altera® FPGA Boards enables FPGA turnkey workflows for programming supported Altera FPGAs. The FPGA turnkey workflow helps you map your algorithm I/O to onboard interfaces, generate HDL code, and synthesize the generated code. HDL Coder also provides integration with Altera Quartus® to synthesize the generated code into a bitstream that you can directly download on to Altera FPGA development boards.
This support package is functional for R2013b and beyond.
Response provided on DE0-Nano support: The answer is that it’s not supported in the support package. Instead, it contains example reference designs for popular boards among our customers. And we provide an API for developing reference designs for everything else. This example shows how to define a custom reference design for an Intel FPGA board: https://www.mathworks.com/help/hdlcoder/examples/ip-core-generation-workflow-without-an-embedded-arm-processor-arrow-deca-max-10-fpga-evaluation-kit.html
Is DE0-Nano supported? It has a Cyclone IV FPGA from Altera.
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