luckfy zhang

Con actividad desde 2018

Followers: 0 Following: 0

Estadística

Feeds

Pregunta

How can I figure out how many delay units do I need in one part of Simulink HDL design?
Hi, Recently, I am interested in debuging your ZYNQ hwswcodesign model. The figure below is one part of Rx Data decoding bl...

casi 6 años hace | 1 respuesta | 0

1

respuesta

Pregunta

How can I migrate MathWorks support on ZedBoard to Xilinx ZC702 board?
Hello, everyone: I have noticed MathWorks support on ZYNQ and AD9361 series algorithm development. All these tutorials are ...

alrededor de 6 años hace | 1 respuesta | 0

1

respuesta

Pregunta

Where can I set output and input port of an HDL-supported Simulink model?
I am using a Simulink model commqpsktxhdl. I have managed to output HDL code and I found that there 3 inputs including clk, clk-...

casi 7 años hace | 1 respuesta | 0

1

respuesta

Pregunta

In simulink, Why does output datatype does not match to my settings?
Hello, everyone. I am using Xilinx System generator in the environment of Simulink. As you can see, I want to use a parallel...

casi 7 años hace | 0 respuestas | 0

0

respuestas