Jack Erickson, MathWorks
HDL Verifier™ generates SystemVerilog DPI components from MATLAB® functions and Simulink® models for use during verification. If a verification team needs to access a component’s internal signals in order to debug from the testbench, the 2015b release introduces the ability to define internal signals as test points. These test points allow a team to access the testbench without having to bring the signals up through ports; instead, the signals are accessed via a DPI function call.
Choose a web site to get translated content where available and see local events and offers. Based on your location, we recommend that you select: .Select web site
You can also select a web site from the following list:
Select the China site (in Chinese or English) for best site performance. Other MathWorks country sites are not optimized for visits from your location.