How to change frequency of sine wave on FPGA IO334?

I want to generate sine wave on FPGA and below is my model on IO334. I want to change the frequency of signal when HDL code generated is already on taget machine(speedgoat FPGA). How can I manipulate the frequency?

Answer 1

[Bharath Venkataraman]

One way to do this is by using the NCO HDL Optimized block and change the phase increment. Here is an example of how to use the block to generate a sine wave.

The other option is to have the build a counter using the delay and add blocks. The step size of the counter will need to be programmable, decided by an input port. Changing this step will change the input to the sine block, hence changing the frequency of the sinve wave emitted.

[Mitali Murkar]

Thank You! I tried implementing NCO HDL block as explained here, I try to change parameters in order to achieve 50Hz frequency. Below attached screenshot has all parameters used but I got frequency of signal 6.44mHz frequency of signal. How can I achieve frequency of 50Hz with frequency resolution of 0,01Hz?

[Bharath Venkataraman]

I used the same calculations for 50 Hz at 0.01Hz resolution. Attached is the script and model. You can see that the generated sine wave is at 50Hz (gap between peaks = 0.02s).

[Mitali Murkar]

Now I can generate the sine wave with 50Hz. Appreciate for a quick response.

I want to generate sine wave on FPGA system by converting MATLAB SIMULINK model to HDL workflow and then run it on target real time system of sppedgoat.

How can I vary the frequency of sine wave with step or resolution of 0.01Hz when the generated model is already created by HDL workflow advisor.I can change the phase increment value to change frequency but how can I do it when model or bitstream is already generated through HDL workflow.

Awaiting your response.

[Bharath Venkataraman]

Glad that model works for you.

If you look at the NCO block, you will see that some of these parameters have an option to be specified via property or input port. If you want the parameter to be programmable, you can set it to be specified by input port, then choose the input to be AXI-Lite register programmable.

Once you specify a resolution, you won't be able to go below that resolution on the fly (the Lookup table of values are fixed in the FPGA), so do keep that in mind.

[Mitali Murkar]

Hi,

I tried recommendations given by you.

I am getting output in SIMULINK but when I try to check output on CRO the output frequency differs.

For attached model the output frequency is 23Hz even though selected parametrs are f=50Hz, resolution=0.01 and Ts=1/5000. (sample time selected for constants=inf)

Could you please let me know what should be the modifications?

Thank you!

[Bharath Venkataraman]

One thing to try is to make all the inputs and outputs the same rate (do not use the inf rate and instead use the red sample rate for all signals).

You can also try putting an NCO block in the generated model (whose picture you attached) to see if the NCO settings are right.

[Mitali Murkar]

Hi,

I will try the both options suggested by you.

You can also try putting an NCO block in the generated model (whose picture you attached) to see if the NCO settings are right: Actually, the attached model in last message was generated model only. Can you explain it again in detail?

I want to generate 3-phase sine wave, for that I can phase shift other two signals by 120degrees. I was wondering if I can do it using NCO block setting but such information is not there in NCO block. Could you please suggest for phase shifting?

My idea is to create 3 signals feeding to MUX block to get 3 phase sine output.

Thanks in advance.

Regards

[Bharath Venkataraman]

For a phase shift, you can either

a. instantiate two NCOs and have them shifted by 120degrees to start and provide the same phase increment or

b.do it yourself with the output of the the first NCO.

Option a seems easier.

I meant to ask you to edit the generated model and put an NCO in there from the original model parallel to the FPGA subsystem to make sure that the data is being passed correctly from the generated model.

[Mitali Murkar]

Hi,

Regarding output frequency, I am still getting 22.5Hz when set frequency is 50Hz.

I tried all suggestions given by you but its still same. Can you please let me know if something is wrong in gm file.

Your input will really help. Just for your input I am working with MATLAB R2020b.

Thanks.

[Bharath Venkataraman]

Could you generate the generated model with HDL code generation as well? That will help make sure that the functionality is correct.

[Mitali Murkar]

Just to clarify the attached model is generated model only from HDL workflow.