Is it possible to generate parametrized HDL for Chart parameters?

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Ion CASU
Ion CASU el 27 de Jun. de 2023
Comentada: Ion CASU el 20 de Jul. de 2023
My current understanding is that it is only possible to generate parametrized HDL only if the mask parameters of a subsystem are used in Gain or Constant block. But is it possible to use them in Chart?
I am not talking about the case where mask parameters are used in constant blocks which are fed as inputs to the Chart. I need the generated code to have actual generic ports (in the case of VHDL, or parameters in the case of Verilog).
Is it possible to achieve?

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Kiran Kintali
Kiran Kintali el 16 de Jul. de 2023
Currently type generics are not supported in HDL Coder. Only value generics are possible with certain blocks as discussed in the above thread.
  1 comentario
Ion CASU
Ion CASU el 20 de Jul. de 2023
Will type generics become available in future releases and when is it expected to happen? Thanks

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