Mixed-Signal Blockset is a Simulink add-on that provides models of components with impairments, analysis tools, and test benches for designing and verifying mixed-signal integrated circuits (ICs).
You can model phased-locked loops, data converters, and other systems at different levels of abstraction and explore a wide range of IC architectures.
For example, you can explore the differences between a fractional-N PLL based on architectures using either an accumulator or a delta sigma modulator.
You can use data-sheet specifications in your models and follow a top-down design methodology.
And you can directly analyze the open and closed loop performance of your PLL using the pre-simulation analysis capability.
You can include impairments such as noise, nonlinearity, and quantization effects, and anticipate the impact of real-world analog imperfections on your system performance.
All architectures and building blocks in Mixed-Signal Blockset are open for learning best modeling practices and suitable for further customization.
Using the testbenches, you can verify system performance and improve modeling fidelity by fitting measurement characteristics or circuit-level simulation results.
For example, you can validate the phase noise performance of your PLL.
You can also use digital or analog cosimulation with 3rd party circuit simulators such as Cadence Virtuoso AMS Designer to validate your model.
Rapid system-level simulation using variable-step Simulink® solvers lets you debug the implementation and identify design flaws before simulating the IC at the transistor level.
Extensive examples help you with easily getting started in modeling your mixed-signal system.
With Mixed-Signal Blockset you can simulate mixed-signal components together with complex DSP algorithms and control logic.
For more information please visit the Mixed-Signal Blockset product page on mathworks.com.
