What Is Signal Integrity Toolbox?
Signal Integrity Toolbox™ provides functions and apps for the design and signal integrity analysis of high-speed serial and parallel links. You can generate experiments covering multiple parameters, extract design metrics, and visualize waveforms and results. You can predict operating margins and link performance by analyzing transmitter, receiver, and channel interactions.
The toolbox supports standard-compliant IBIS-AMI models for statistical and time-domain simulation to analyze equalization and clock recovery. You can describe the channel using multiport S-parameter data, IBIS, HSPICE, and analytical models.
Signal Integrity Toolbox lets you analyze waveforms and eye diagrams and measure channel quality while observing effects such as ISI, jitter, and noise. You can analyze the channel in the frequency domain for insertion loss, return loss, and crosstalk, and verify compliance with industry standards including IEEE® 802.3, OIF, PCIe, and DDR.
Before layout, you can evaluate tradeoffs and optimize parallel and serial links for cost, performance, reliability, and compliance. You can then perform post-layout verification of the system and correlate simulation results with measurement data.
Published: 22 Feb 2022
Signal Integrity Toolbox enables you to perform pre-layout analysis of high-speed serial and parallel links, as well as post-layout verification of printed circuit board designs. Using built-in apps, you can create comprehensive experiments that cover multiple design parameters. You can easily visualize and export your results.
Using the Serial Link Designer app, you can create high-speed, multi-gigabit, end-to-end serial channels. The app helps you to create channels that consist of IBIS-AMI and HSPICE models, S-parameters for components, including chip packages and connectors, as well as lossy transmission lines and in the as
With the Parallel Link Designer app, you can determine setup and hold timing and voltage margins for your high-speed, parallel-linked designs. The app enables you to look for and address the effects of amplitude ringing and high slew rates.
The Toolbox includes dozens of industry standard design kits you can use to evaluate your individual component in a pre-built compliant channel. You can verify your entire system design, using pre-configured transmitter and receiver models, eyediagram masks, or S-parameter rules. You can sweep a variable with a few values, or you can sweep multiple variables and values to create thousands of unique links. This will allow you to explore large design spaces quickly and easily, especially when used with the Parallel Computing Toolbox and MATLAB Parallel Server.
You can import IBIS-AMI models with ease. Models created with SerDes Toolbox can be directly exported in the Signal Integrity Toolbox to perform regression analysis. If the IBIS-AMI model has any problems, you can easily bring the model configuration, stimuli, and channel back into SerDes Toolbox to correct any issues.
You can perform post-layout verification of printed circuit boards that were laid out in a variety of PCB CAD software. Signal integrity can be assessed on a few or all of the nets across multiple boards, packages, and connectors. If any issues are discovered, the topologies design space can be further explored in pre-layout, and fixes fed back to the PCB Designer.
Using the Signal Integrity Viewer app, you can create and visualize waveforms in both the time and frequency domains, analyze channel S-parameters, transfer functions, pulse, impulse, and step responses, visualize statistical and persistent eyediagrams and contours, bathtub, and clock probability plots.
Install Signal Integrity Toolbox today, and try the many examples to rapidly get started with signal integrity design and analysis.